Much of our research in the past few years has focused on SIS heterodyne mixer technology, incorporating high-quality SIS junctions for low noise detection of millimeter radiation. We design and fabricate complete mixer chips in our microfabrication facility, the UVML, at UVa. These are typically on quartz substrates, though recent work has explored the use of ultra-thin silicon substrates. Through years of hard work and optimization, we have developed high-yield, high-uniformity processes for fabricating the superconducting circuits of these chips. The key to reproducible micron-scale SIS junctions is our self-aligned quadlevel resist process. This is an extremely clever technique that allows us to use a single optically-defined structure to serve as both the etch mask for the top Nb electrode and as a liftoff stencil for the insulation layer. More information on quadlevel structures can be found in the drop-down menu above. As we continue to investigate smaller and smaller junctions, the quadlevel technique becomes increasingly important, as machine-aligned junction vias become impractical.