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Barry Wayne Johnson

L.A. Lacy Distinguished Professor and Sr. Associate Dean, SEAS, IEEE Fellow

Contact
Thornton Hall - A126
351 McCormick Road
PO Box 400743
Charlottesville, VA 22904-1000

Phone: (434) 924-7623
FAX: (434) 924-8818
Email: bwj@virginia.edu


Summary:
Dr. Johnson's research focuses on techniques for designing and analyzing safety-critical systems. The research focuses on architectures and algorithms to ensure the safety of hardware/software systems. In addition, the research is developing techniques for modeling, analyzing, and predicting the safety of these types of systems. The research results have been applied to many industrial systems including most recently the Copenhagen Metro system and a nuclear digital control system. The research activities are currently funded by the Nuclear Regulatory Commission, Union Switch and Signal, Electricite de France, and NASA Langley Research Center.

Background:
B.S.E.E., University of Virginia, 1979
M.E.E.E., University of Virginia, 1980
Ph.D E.E., University of Virginia, 1983
Associate Principal Engineering, Harris Corp., 1982-1984
Assistant Professor, University of Virginia, 1984-1989
Associate Professor, University of Virginia, 1989-1994
Professor, University of Virginia, 1994-present
Co-Director, Center for Safety-Critical Systems, 1998-present

Dr. Johnson has served on the faculty since 1984. In 2006 he was promoted to Senior Associate Dean and Associate Dean of Research for SEAS. He has published more than 130 technical articles. He has received many national and international awards, including the Frederick Emmons Terman Award, the C. Holmes MacDonald Award, and the Alan Berman Research Publications Award. The University of Virginia awarded him the Alumni Board of Trustees and University of Virginia Endowment Fund Young Teacher Award. The State Council of Higher Education for Virginia also awarded him its Outstanding Faculty Award. Dr. Johnson was named a Fellow of IEEE for his contributions to fault-tolerant computing.

Research

  • "Embedded Real-Time Safety-Critical Hardware/Software Systems", Nuclear Regulatory Commission
  • "Safety Assessment of a Railway System Controller", Union Switch and Signal
  • "Formal Approaches to the Design of Safety-Critical Systems", NASA Langley Research Center
  • "Safety Assessment of Digital Systems Incorporating Application Specific Integrated Circuits (ASICS)", Electricite de France

Most Recent Publications:

  • Choi, C. Y., Johnson, B. W., and Profeta, III, J. A., "Safety Issues in the Comparative Analysis of Dependable Architectures", IEEE Transactions on Reliability, Vol. 46, No. 3, September 1997, pp. 316-322.
  • Smith, D. T., Johnson, B. W., Andrianos, N., and Profeta, III, J. A., "A Variance Reduction Technique Using Fault Expansion for Fault Coverage Estimation", IEEE Transactions on Reliability, Vol. 46, No. 3, September 1997, pp. 366-374.
  • Hayne, R. J. and Johnson, B. W., "Behavioral Fault Modeling in a VHDL Synthesis Environment", Proceedings of the IEEE VLSI Test Symposium, Dana Point, California, April 25-29, 1999, pp. 333-340.
  • Smith, D. T., DeLong, T. A., Johnson, B. W., and Giras, T. C., "A Safety Assessment Methodology for Complex Safety-Critical Hardware/Software Systems", Proceedings of the International Topical Meeting on Nuclear Plant Instrumentation, Control, and Human-Machine Interface Technologies, Washington, D.C., November 13-17, 2000, 13 pages, (Invited Paper).
  • Smith, D. T., DeLong, T. A., Johnson, B. W., and Giras, T. C., "Determining the Expected Time to Unsafe Failure Using Established Dependability Metrics", Proceedings of the High Assurance Systems Engineering Conference, Albuquerque, New Mexico, November 15-17, 2000, pp. 17-24.

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